• Agilent Technologies Application Note 1462, Using Advanced Design System to Design an MMIC Amplifier. 40-page Application Note, 17 June 2003. PDF, 4.2 MB.

  This application note illustrates, through the design of an MMIC amplifier, several of the common problems faced in designing, simulating, and producing a physical layout of an MMIC circuit, as well as the validation steps that are needed to verify that the physical layout still produces the desired result. Advanced Design System (ADS) is used throughout the design flow.

  The various sections in this Application Note give a step-by-step description of a 0.5-Watt, 10-GHz, narrow-band amplifier on a 100-µ GaAs substrate. The example files that are used here $HPEESOF_DIR/examples/MW_Ckts/MMIC_Amp_prj and $HPEESOF_DIR/examples/MW_Ckts/MMIC_AmpEM_Sims_prj are both included with the ADS 2003A software.

  These example designs use components from a generic design kit that is provided with ADS 2003A: $HPEESOF_DIR/examples/DesignKit/DemoKit. The models for these components do not correspond to any specific foundry process but are representative of design kits available from many foundries.

The following downloadable files are archived ADS project files for use with Advanced Design System ADS 2003C (and later). They are ready to download from this web site, using your web browser. When the file or files have been downloaded, run Advanced Design System and use the menu command   File > Unarchive Project   in the Main Window to open the project.

• PolarModulation_prj.zap (2.7 MB)

  This example shows a number of simulations concerning polar modulation. This is a power amplification technique that allows non-constant envelope signals (like EDGE) to be amplified with minimal distortion, using highly-nonlinear, efficient amplifiers like Class C. The example includes simulations of a transistor-level Class C amplifier within a polar modulation loop, that show output power, output spectrum, power-added efficiency, and EVM.

• RFIC_IQdemod_wFETs_prj (1.5 MB)

  This example shows different simulations of a simplified I-Q demodulator. There are several different versions of the demodulator, some with a frequency divider to generate two quadrature LO signals and some with a phase splitter circuit to generate the quadrature LOs. There are versions with a transistor-level VCO and with ideal signal sources (instead of a VCO) driving the frequency divider or phase splitter. Of particular interest are the very fast TOI simulations (90 seconds on a Compaq nc6000) when the LO and RF signals are very close, resulting in a direct downconversion.

The following downloadable file is an archived ADS project file for use with Advanced Design System ADS 2003A (and later). It is ready to download from this web site, using your web browser. When the file or files have been downloaded, run Advanced Design System and use the menu command   File > Unarchive Project   in the Main Window to open the project.

• PLL_ModelingSem_prj (2.0 MB)

  This project shows the addition of phase noise to a behavioral-model VCO, the simulation and calculation of jitter in a behavioral-model phase/frequency detector and charge pump, simulations (including noise) of a transistor-level phase/frequency detector and charge pump, and basic simulations of a VCO/divide-by-N behavioral model.

  Ths file will unarchive as the project   PLL_ModelingSem_prj and can be used with ADS 2002C or ADS 2003A (and later).

• ADS2003A: FreqDoubler_prj (345 KB)

  This example shows the design and optimization of a simple diode frequency doubler. It works well for input signals from 1 to 8 GHz. Small-signal mixer mode is used in some of the simulations to measure the output impedance at the doubled frequency, while the input is being driven at the fundamental frequency. This example was developed using ADS 2003A, so you need ADS 2003A or later code to unarchive it.

  Ths file will unarchive as the project:   FreqDoubler_prj

The following downloadable files are archived ADS projects for use with Advanced Design System ADS 2002, ADS 2001, ADS 1.5 - and all later versions of ADS. They are ready to download from this web site, using your web browser. When the file or files have been downloaded, run Advanced Design System and use the menu command File > Unarchive Project in the Main Window to open the project.

• ADS2002: LoadPull_prj (1.9 MB)
• ADS2001: LoadPull2001_prj (1.8 MB)

  This is an updated version of the ADS example RF_Board/LoadPull_prj. It shows several new capabilities. Within the project is a PowerPoint (tm) presentation that you can read on a PC, that explains the simulation setups and data display equations in detail. Also, several new, more simple simulation setups have been added, that allow you to specify a range of magnitudes and phases for the load reflection coefficient. (Until now, the example just showed setups that simulate load reflection coefficients in a circular region of the Smith chart.) There are also simulation setups that show how to generate contours of constant power-added efficiency and constant bias current, with all of the contours corresponding to one, user-specified power delivered.

  These files will unarchive as the project LoadPull_prj (ADS2002) and LoadPull2001_prj (ADS2001).

• DivBy8_wTAHB_prj (1.0 MB)

  This project shows how to simulate a 1/8 frequency divider, including phase noise, using transient-assisted harmonic balance (TAHB). The project runs only on ADS 2002, although the techniques can be used with versions of ADS as early as ADS 1.3.

  This file will unarchive as the project DivBy8_wTAHB_prj.

  NOTE. This example runs only on ADS 2002. It has been placed here in advance of the release of ADS 2002 as a convenience for Beta testing and field demos. For more information, please contact your Agilent EEsof EDA representative.

• TranNoise_prj (1.67 MB)

  This project shows the simulation of oscillator phase noise or jitter, in the time domain. It shows two new capabilities of ADS 2001, simulation of noise in transient analysis and use of the cross( ) function to measure the period of a waveform.

  This file will unarchive as the project TranNoise_prj.

• Pulsed_Amp_prj (126 KB)

  This example shows the simulation of a power amplifier with a pulsed input signal. It uses the Circuit Envelope simulator, which allows you to see fundamental and harmonic signals as well as bias currents versus time, during a pulse.

  This example requires the use of ADS 2001, although the same simulation techniques are also available in ADS 1.5.

  This file will unarchive as the project Pulsed_Amp_prj.

• PLL_PFD_CP_wFETs_prj (1.7 MB)

  This project has a number of simulations of a transistor-level charge pump and phase/frequency detector (PFD). There are noise simulations,and an extraction of a behavioral model for the charge pump which takes into account variation in current with output voltage. There is also a simple simulation of an all-transistor PLL.

  This example requires the use of ADS 2001, although the same simulation techniques are also available in ADS 1.5.

  This file will unarchive as the project PLL_PFD_CP_wFETs_prj.

• FreqDivider_prj� (755 KB)

  This example shows how to simulate a frequency divider or prescaler circuit. It includes both time-domain and frequency-domain simulations, as well as sweeps of the input clock signal frequency. Phase noise is also simulated, using the Transient-Assisted Harmonic Balance (TAHB) technique. The input and output signals are differential-mode.

  This example requires the use of ADS 2001, although the same simulation techniques are also available in ADS 1.5.

  This file will unarchive as the project FreqDivider_prj.

• Tri_mode_Downconverter_prj� (1.6 MB)

  This project has been created based on a tri mode downconverter IC used in a PCS/CDMA/AMPS wireless phone. It had originally been designed and fabricated using a bipolar process.

  This RFIC design uses three types of ADS simulations to predict the performance of the final chip. Using Harmonic Balance, Circuit Envelope and S-Parameter simulations, the important specifications such as conversion gain, Noise Figure, IIP3, ACPR, input/output return loss, and current consumption have been determined.

  This file will unarchive as the project Tri_mode_Downconverter_prj.

• PhFreqDet_wDeadzone_prj.zap� (1.5 MB)

  This example shows simulations of a phase-locked loop (PLL) using a behavioral-model phase/frequency detector, which has a deadzone. Also included are simulations of phase/frequency detectors by themselves, showing relationships between input and output waveforms.

• hdlcosimeg.zap�(36 KB)

  This example shows the HDL co-simulation capability of ADS. Included is an IIR filter built using the Digital Filter tool. Fixed point components such as registers, gain, and adders are used.

  VHDL and Verilog versions of this filter are generated in ADS. The design test_iir_lp_2.dsn shows the co-simulation of HDL code with ADS.

  This file will unarchive as the project iir_filter_prj.

• IQ_Mod_from_MDS_prj.zap (3.1 MB)

  Updated 13 November 2001. This example shows the simulation of a direct-conversion, transistor-level I-Q modulator. Included are differential-mode mixers, a combiner, a buffer, and a power amplifier. Many simulations of the sub-circuits as well as the modulator are included: amplifier gain compression, load pull, AC frequency responses, mixer intermodulation distortion as a function of various swept parameters, modulator amplitude and phase accuracy, simulations with CDMA baseband data sources, and others. Many of the simulations would be almost impossible to complete with a purely time-domain simulator such as SPICE.

  This file will unarchive as the project IQ_Mod_from_MDS_prj.

  This example was discussed briefly in the article by Andy Howard, Simulate An I/Q Modulator, Microwaves & RF, February 2002.

  Click on the following link for the complete 22-page version of this article:

  • Andy Howard, Agilent Technologies, Efficiently simulating a direct-conversion I/Q Modulator (PDF, 300 KB)

• PLL_SigmaDelta_prj.zap (2.2 MB)

  This project shows the simulation of a fractional-divider phase locked loop. It combines fractional synthesis with sigma-delta modulation to achieve frequency synthesis with spurious-free output and nearly infinite resolution.

  This file will unarchive as the project PLL_SigmaDelta_prj.

  NOTE     This example PLL_SigmaDelta_prj has been left out of the Examples directory because of its large file size.